A monthly email packed with valuable content—industry news, tutorials, obsolescence updates, and more.
No sales pitches, just insights we think you'll find helpful!
A monthly email packed with valuable content—industry news, tutorials, obsolescence updates, and more.
No sales pitches, just insights we think you'll find helpful!
Very often hum is present on the signals under test. This can be easily determined from the screen because the hum is related to the line frequency. If a signal shows a kind of unexpected...
Read MoreWhile measuring complex waveforms in digital techniques, mistakes can be made very easily. In this section, examples of this are presented. Some of them are explained in detail, to gain knowledge about the possible reasons...
Read MorePULSE DEFINITIONS In digital techniques, it can happen that two pulses appear in a timerelated sequence, but that the second pulse appears a little later, with a delay, with respect to the first one. If...
Read MoreNI’s story is one of persistent dedication to excellence, innovative technology, and unrelenting perseverance, which has led the company from its modest origins in 1976 to its current position as a global leader in engineering innovation. In...
Read MoreCURRENT PROBES Basically, the current probe is a transformer of which the primary winding is the test lead through which the current is measured. The probe head consists of a ferrox-cube core and the secondary...
Read MoreTerminated HF Probes At higher frequencies, the input capacitance has much less impedance (Xe) than the 10- or 20-MO input resistance of the probe. For the circuit under test, this means that if the internal...
Read MoreA plug-in oscilloscope is electrically like any other oscilloscope. The mechanical housing of the plug-in instrument is different from that of the compact one, because the former consists of a mainframe to which one or...
Read MoreThe delayed time base is started (or triggered) when the MTB sweep has reached a certain level, which is compared to a preset dc level. The preset level is thus reached a certain time after...
Read MoreTTL Triggering In logic systems employing building blocks (gates, Aip-Aop, etc.), a logic state level may be defined to determine whether a logic signal is supposed to be in its 0 (zero) or in its...
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